SC418
27
Applications Information (continued)
All components connected to the FB pin must
be located near the pin. The FB traces should be
kept small and not routed near any noisy switch-
ing connections or power components.
Place the R
ILIM
resistor near the IC. For an accu-
rate I
LIM
current sense connection, route the R
ILIM
trace directly to the drain of the low-side MOSFET
(LX). Use an inner routing layer if needed.
Place the R
TON
resistor near the TON pin. Route
R
TON
to the TON pin and to AGND using short
traces and avoid all switching signals.
For the LDO components
The FBL resistors should be placed near
the FBL pin. The area of the FBL traces
should be minimized, avoiding all switch-
ing connections.
The top FBL resistor must route directly
to the LDO output capacitor. The LDO
load current should not flow through this
trace.
Bypass Capacitors
The device requires bypass capacitors for the following
pins.
VDDA pin with respect to AGND. This 0.糉
minimum capacitor must be placed and routed
close to the IC pins, on the same layer as the IC.
VDDP with respect to PGND. This 糉 minimum
capacitor must be placed and routed close to
the IC pins and on the same layer as the IC.
BST pin with respect to LX. This 0.糉 minimum
capacitor must be placed near the IC, on either
side of the PCB. Use short traces for the routing
between the capacitor and the IC.
VLDO pin with respect to AGND.
This is the LDO output capacitor.
The placement of this capacitor is not
critical, however for routing it is important
that the top FBL resistor connects directly
to this capacitor, and that the LDO load
current does not flow through this trace.
If VLDO is not used to power the device
then a minimum 糉 capacitor referenced
to AGND is required.
If VLDO is used to power the device then
"
"
"
"
?/DIV>
?/DIV>
"
"
"
"
?/DIV>
?/DIV>
?/DIV>
?/DIV>
the VDDA and VDDP capacitors also
function as the LDO output capacitor.
For VDDA, a minimum 0.糉 capacitor ref-
erenced to AGND is required. For VDDP,
a minimum 糉 capacitor referenced to
PGND is required.
VIN pin with respect to AGND. This 0.糉
minimum capacitor must be placed and routed
close to the IC pins. This capacitor provides
noise filtering for the input to the internal LDO.
"
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